1. Field of the Invention
The present invention relates to an organic electro luminescence (EL) display and method of fabricating the same and, more particularly, to an organic EL display with high luminous efficiency and method of fabricating the same.
2. Discussion of the Related Art
Generally, an organic EL display emits light when an exciton drops from an excited state to a ground state. An electron injected from an electron injection electrode (cathode) and a hole injected from a hole injection electrode (anode) combine within an emitting layer to create an exciton.
Therefore, unlike a conventional thin film liquid crystal display, the present invention does not require an additional light source, which provides for reduced volume and weight of the device.
Methods for driving the organic EL display may be divided into a passive-matrix type and an active-matrix type.
The configuration and method of fabricating the passive-matrix organic EL display may be simple, but it has high power consumption, and it is difficult to manufacture large, passive matrix displays. Also, because a passive matrix device requires more wiring, its aperture ratio may be smaller.
Therefore, the passive-matrix organic EL display is often used for a smaller display, while the active-matrix organic EL display is typically used for a larger display.
The prior art will now be described with reference to the accompanying drawing.
FIG. 1 is a cross-sectional view illustrating a conventional bottom-emission organic EL display.
Referring to FIG. 1, an active layer 120 made of poly-Si is formed on a buffer layer 110 of an insulating substrate 100.
A gate insulating layer 130 is formed on the active layer 120 and the insulating substrate 100, and a gate electrode 140 is formed on the gate insulating layer 130.
Subsequently, using the gate electrode 140 as a mask, impurities are doped into the active layer 120 to form source/drain regions 121 and 125. A region between the source/drain regions 121 and 125 acts as a channel region 123 of the thin film transistor (TFT).
After forming the source/drain regions 121 and 125, an interlayer insulating layer 150 is formed with contact holes 151 and 155, which expose the source/drain regions 121 and 125. A conductive material is then deposited on the insulating substrate 100 and patterned to form source/drain electrodes 161 and 165, which are electrically coupled to the source/drain regions 121 and 125, thus forming the TFT.
A passivation layer 170, made of SiNx, is formed on the insulating substrate 100 having the TFT, and a planarization layer 180 is formed on the insulating substrate 100 to remove the step of an underlying structure.
Next, a via hole 185 is formed to expose a portion of one of the source/drain electrodes 161, 165. In FIG. 1, the via hole 185 exposes the drain electrode 165.
After forming the via hole 185, an organic EL element 190, electrically coupled to the drain electrode 165 through the via hole 185, is formed.
Here, the organic EL element 190 comprises a first electrode 191, a pixel defining layer 192 having an opening exposing a portion of the first electrode 191, an organic emitting layer 193, and a second electrode 194.
Although not shown in the drawings, the TFT and the organic EL element 190 are then encapsulated using an encapsulation substrate as an upper insulating substrate.
However, the organic EL display formed as described above has a low light transmittance material in a region where light emitted from the organic EL element 190 transmits (emission region). For example, the buffer layer 110 or the passivation layer 170 may be formed of the low light transmittance material. Specifically, when the buffer layer 110 or the passivation layer 170 is made of SiNx, and the SiNx is 6000 Å to 3 μm thick, the light transmittance may be significantly reduced to 75% to 80%, which lowers the luminous efficiency of the organic EL display.
In order to address the above problem, Korean laid-open Patent application No. 2003-0085239 discloses an organic EL display wherein a buffer layer, a gate insulating layer, an interlayer insulating layer and a passivation layer, formed on the emission region of the insulating substrate, are all etched and removed to expose the insulating substrate. However, removing all of the underlying layers of the emission region as disclosed in the above Patent application may form a large step of more than 1.3 μm between the emission region and the non-emission region. Therefore, it may cause an open failure of a pixel electrode formed by sputtering a transparent conductive material, such as indium tin oxide (ITO) and indium zinc oxide (IZO).
Further, forming and removing multiple layers may complicate the fabrication process.
Also, since the pixel electrode is directly formed on the insulating substrate, impurities such as metal ions may diffuse from the insulating substrate 100, thereby penetrating the pixel electrode.